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| AP4226D Advanced Power Electronics Corp. Low On-resistance Single Drive Requirement PDIP-8 Package G2 D1 D2 D2 D1 N-CHANNEL ENHANCEMENT MODE POWER MOSFET BVDSS RDS(ON) ID S2 G1 S1 30V 18m 8.2A PDIP-8 Description D1 D2 The Advanced Power MOSFETs from APEC provide the designer with the best combination of fast switching, ruggedized device design, ultra low on-resistance and cost-effectiveness. G1 S1 G2 S2 Absolute Maximum Ratings Symbol VDS VGS ID@TA=25 ID@TA=70 IDM PD@TA=25 TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Continuous Drain Current Pulsed Drain Current 1 3 3 Rating 30 20 8.2 6.7 30 2 0.016 -55 to 150 -55 to 150 Units V V A A A W W/ Total Power Dissipation Linear Derating Factor Storage Temperature Range Operating Junction Temperature Range Thermal Data Symbol Rthj-a Parameter Thermal Resistance Junction-ambient 3 Value Max. 62.5 Unit /W Data and specifications subject to change without notice 200218041 AP4226D Electrical Characteristics@Tj=25oC(unless otherwise specified) Symbol BVDSS BVDSS/Tj Parameter Drain-Source Breakdown Voltage Test Conditions VGS=0V, ID=250uA 2 Min. 30 1 - Typ. 0.03 15 20 5 12 12 8 31 12 320 230 Max. Units 18 28 3 1 25 100 30 V V/ m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF Breakdown Voltage Temperature Coefficient Reference to 25, ID=1mA RDS(ON) Static Drain-Source On-Resistance VGS=10V, ID=8A VGS=4.5V, ID=6A VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Gate Threshold Voltage Forward Transconductance Drain-Source Leakage Current (Tj=25 C) Drain-Source Leakage Current (Tj=70 C) o o VDS=VGS, ID=250uA VDS=10V, ID=6A VDS=30V, VGS=0V VDS=24V ,VGS=0V VGS= 20V ID=8A VDS=24V VGS=4.5V VDS=15V ID=1A RG=3.3,VGS=10V RD=15 VGS=0V VDS=25V f=1.0MHz Gate-Source Leakage Total Gate Charge 2 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance 2 1450 2320 Source-Drain Diode Symbol VSD Parameter Forward On Voltage 2 2 Test Conditions IS=1.7A, VGS=0V IS=8A, VGS=0V, dI/dt=100A/s Min. - Typ. 27 18 Max. Units 1.2 V ns nC trr Qrr Reverse Recovery Time Reverse Recovery Charge Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3. Mounted on 1 in2 copper pad of FR4 board ;90/W when mounted on min. copper pad. AP4226D 35 35 T A =25 o C 28 10V T A =150 C 5.0V 4.0V ID , Drain Current (A) 28 o 10V 5.0V 4.0V ID , Drain Current (A) 21 21 14 14 7 7 V G =3.0V V G =3.0V 0 0 1 1 2 2 3 0 0 1 1 2 2 3 V DS , Drain-to-Source Voltage (V) V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 80 1.8 I D =6A T A =25 60 1.6 I D =8A V GS =10V Normalized R DS(ON) 2 4 6 8 10 12 1.4 RDS(ON) (m ) 40 1.2 1 20 0.8 0 0.6 -50 0 50 100 150 V GS , Gate-to-Source Voltage (V) T j , Junction Temperature ( o C) Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance v.s. Junction Temperature 2.25 10 2.00 IS(A) 1 T j =150 o C T j =25 C o VGS(th) (V) 1.6 1.75 1.50 0.1 0 0.4 0.8 1.2 1.25 -50 0 50 100 150 V SD ,Source-to-Drain Voltage (V) T j , Junction Temperature ( o C ) Fig 5. Forward Characteristic of Reverse Diode Fig 6. Gate Threshold Voltage v.s. Junction Temperature AP4226D 16 10000 f=1.0MHz I D =8A VGS , Gate to Source Voltage (V) 12 V DS =15V V DS =20V V DS =24V C (pF) 1000 C iss 8 4 C oss C rss 0 0 10 20 30 40 50 100 1 5 9 13 17 21 25 29 Q G , Total Gate Charge (nC) V DS , Drain-to-Source Voltage (V) Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics 100 1 Duty factor=0.5 100us 10 Normalized Thermal Response (Rthja) 0.2 1ms ID (A) 1 0.1 0.1 0.05 10ms 100ms 1s 0.02 0.01 PDM 0.01 Single Pulse t T Duty factor = t/T Peak Tj = PDM x Rthja + Ta Rthja = 90/W 0.1 T A =25 o C Single Pulse DC 0.01 0.1 1 10 100 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 V DS , Drain-to-Source Voltage (V) t , Pulse Width (s) Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance VDS 90% VG QG 4.5V QGS QGD 10% VGS td(on) tr td(off) tf Charge Q Fig 11. Switching Time Waveform Fig 12. Gate Charge Waveform |
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